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[ Източник: covered  ]

Пакет: covered (0.7.10-3build1)

Връзки за covered

covered

Ресурси за Trisquel:

Изтегляне на пакет-източник covered.

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Външни препратки:

Подобни пакети:

Verilog code coverage analysis tool

Covered is a Verilog code coverage utility that reads in a Verilog design and a generated VCD/LXT dumpfile from that design and generates a coverage file that can be merged with other coverage files or used to create a coverage report. Covered also contains the GUI coverage report utility that reads in a coverage file to allow interactive coverage discovery. Areas of coverage measured by Covered are: line, toggle, memory, combinational logic, FSM state/state-transition and assertion coverage.

Други пакети, свързани с covered

  • зависимости
  • препоръчани
  • предложени
  • dep: libc6 (>= 2.11) [armhf]
    GNU C Library: Shared libraries
    също и виртуален пакет, предлаган от libc6-udeb
    dep: libc6 (>= 2.14) [amd64]
  • dep: libtcl8.6 (>= 8.6.0)
    Tcl (the Tool Command Language) v8.6 - run-time library files
  • dep: libtk8.6 (>= 8.6.0)
    Tk toolkit for Tcl and X11 v8.6 - run-time files
  • dep: tklib
    standard Tk Library
  • dep: zlib1g (>= 1:1.1.4)
    compression library - runtime
  • rec: iverilog
    Icarus verilog compiler
    или verilog
    виртуален пакет, предлаган от iverilog
    или gplcver (>= 2.12a-1.1)
    Verilog simulator

Изтегляне на covered

Изтегляне за всички налични архитектури
Архитектура Големина на пакета Големина след инсталиране Файлове
amd64 527,1 кБ2375 кБ [списък на файловете]
armhf 456,9 кБ1790 кБ [списък на файловете]