Skip to content
Sections
>> Trisquel >> Packages >> etiona >> electronics >> alliance
[  etiona  ]
[ Source: alliance  ]

Package: alliance (5.1.1-1.1build1)

VLSI CAD Tools

Alliance is a complete set of free CAD tools and portable libraries for VLSI design. It includes a VHDL compiler and simulator, logic synthesis tools, and automatic place and route tools.

A complete set of portable CMOS libraries is provided, including a RAM generator, a ROM generator and a data-path compiler.

Alliance is the result of more than ten years effort spent at ASIM department of LIP6 laboratory of the Pierre et Marie Curie University (Paris VI, France).

Alliance has been used for research projects such as the 875 000 transistors StaCS superscalar microprocessor and 400 000 transistors IEEE Gigabit HSL Router.

Alliance provides CAD tools covering most of all the digital design flow: 

 * VHDL Compilation and Simulation
 * Model checking and formal proof
 * RTL and Logic synthesis
 * Data-Path compilation
 * Macro-cells generation
 * Place and route
 * Layout edition
 * Netlist extraction and verification
 * Design rules checking

Other Packages Related to alliance

  • depends
  • recommends
  • suggests
  • dep: libc6 (>= 2.11) [i386]
    GNU C Library: Shared libraries
    also a virtual package provided by libc6-udeb
    dep: libc6 (>= 2.14) [amd64]
  • dep: libgcc1 (>= 1:3.0)
    GCC support library
  • dep: libstdc++6 (>= 5.2)
    GNU Standard C++ Library v3
  • dep: libx11-6
    X11 client-side library
  • dep: libxm4 (>= 2.3.4)
    Motif - X/Motif shared library
  • dep: libxpm4
    X11 pixmap library
  • dep: libxt6
    X11 toolkit intrinsics library

Download alliance

Download for all available architectures
Architecture Package Size Installed Size Files
amd64 5,111.8 kB17012 kB [list of files]
i386 5,154.4 kB17066 kB [list of files]