[ Pakiet źródłowy: iverilog ]
Pakiet: verilog (10.1-0.1build1)
Odnośniki dla verilog
Zasoby systemu Trisquel:
- Install using apturl
- Entry at directory.fsf.org
- Raporty o błędach
- Changelog
- Informacje nt. praw autorskich
Pobieranie pakietu źródłowego iverilog:
Opiekun:
Original Maintainers:
- Debian Electronics Team (Archiwum e-mail)
- Hamish Moffatt
- Wesley J. Landaker
- Ramakrishnan Muthukrishnan
- أحمد المحمودي (Ahmed El-Mahmoudy)
Zasoby zewnętrzne:
- Strona internetowa [iverilog.icarus.com]
Podobne pakiety:
Icarus verilog compiler (transitional package)
Icarus Verilog is intended to compile all of the Verilog HDL as described in the IEEE-1364 standard. It is not quite there yet. It does currently handle a mix of structural and behavioral constructs.
The compiler can target either simulation, or netlist (EDIF).
This is a dummy transitional package that will ensure a proper upgrade path. This package may be safely removed after upgrading.
Pobieranie verilog
| Architektura | Rozmiar pakietu | Rozmiar po instalacji | Pliki |
|---|---|---|---|
| all | 2,6 KiB | 13 KiB | [lista plików] |