[ 源代码: arachne-pnr ]
软件包: arachne-pnr (0.1+20180513git5d830dd-1ubuntu2)
arachne-pnr 的相关链接
Trisquel 的资源:
下载源码包 arachne-pnr:
- [arachne-pnr_0.1+20180513git5d830dd-1ubuntu2.dsc]
- [arachne-pnr_0.1+20180513git5d830dd.orig.tar.gz]
- [arachne-pnr_0.1+20180513git5d830dd-1ubuntu2.debian.tar.xz]
维护者:
Original Maintainers:
- Debian Science Maintainers (Mail Archive)
- Ruben Undheim
外部的资源:
- 主页 [github.com]
相似软件包:
Place and route tool for iCE40 family FPGAs
Arachne-pnr implements the place and route step of the hardware compilation process for FPGAs. It accepts as input a technology-mapped netlist in BLIF format, as output by the Yosys synthesis suite for example. It currently targets the Lattice Semiconductor iCE40 family of FPGAs. Its output is a textual bitstream representation for assembly by the IceStorm icepack command. The output of icepack is a binary bitstream which can be uploaded to a hardware device.
Together, Yosys, arachne-pnr and IceStorm provide an fully open-source Verilog-to-bistream tool chain for iCE40 1K and 8K FPGA development.
其他与 arachne-pnr 有关的软件包
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- dep: arachne-pnr-chipdb
- Chip db files for arachne-pnr
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- dep: fpga-icestorm
- Tools to handle the bitstream format of Lattice iCE40 FPGAs
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- dep: libc6 (>= 2.29)
- GNU C Library: Shared libraries
同时作为一个虚包由这些包填实: libc6-udeb
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- dep: libgcc-s1 (>= 3.0) [amd64]
- GCC support library
- dep: libgcc-s1 (>= 3.5) [armhf]
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- dep: libstdc++6 (>= 9)
- GNU Standard C++ Library v3
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- dep: yosys
- Framework for Verilog RTL synthesis