[ 源代码: covered ]
软件包: covered-doc (0.7.10-3build1)
covered-doc 的相关链接
Trisquel 的资源:
下载源码包 covered:
维护者:
Original Maintainers:
- Debian Electronics Team (Mail Archive)
- أحمد المحمودي (Ahmed El-Mahmoudy)
外部的资源:
- 主页 [covered.sourceforge.net]
相似软件包:
Verilog code coverage analysis tool - documentation
Covered is a Verilog code coverage utility that reads in a Verilog design and a generated VCD/LXT dumpfile from that design and generates a coverage file that can be merged with other coverage files or used to create a coverage report. Covered also contains the GUI coverage report utility that reads in a coverage file to allow interactive coverage discovery. Areas of coverage measured by Covered are: line, toggle, memory, combinational logic, FSM state/state-transition and assertion coverage.
This package contains the documentation.