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[ 原始碼: arachne-pnr  ]

套件: arachne-pnr-chipdb (0.1+20160813git52e69ed-1)

Chip db files for arachne-pnr

Arachne-pnr implements the place and route step of the hardware compilation process for FPGAs. It accepts as input a technology-mapped netlist in BLIF format, as output by the Yosys synthesis suite for example. It currently targets the Lattice Semiconductor iCE40 family of FPGAs. Its output is a textual bitstream representation for assembly by the IceStorm icepack command. The output of icepack is a binary bitstream which can be uploaded to a hardware device.

This package contains the binary versions of the chipdb files needed by arachne-pnr

下載 arachne-pnr-chipdb

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硬體架構 套件大小 安裝後大小 檔案
all 2,968.1 kB13875 kB [文件列表]