[ 原始碼： gplcver ]
套件： gplcver (2.12a-1.1build1)
Verilog simulator
Cver is a full 1995 IEEE P1364 standard Verilog simulator. It also implements some of the 2001 P1364 standard features. All three PLI interfaces (tf_, acc_, and vpi_) are implemented as defined in the IEEE 2001 P1364 LRM.
Homepage: http://www.pragmatic-c.com/gpl-cver
其他與 gplcver 有關的套件
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- dep: libc6 (>= 2.11) [armhf]
- GNU C Library: Shared libraries
同時作為一個虛擬套件由這些套件提供： libc6-udeb
- dep: libc6 (>= 2.14) [amd64]