套件: opensta (0~20191111gitc018cb2+dfsg-1build1)
opensta 的相關超連結
Trisquel 的資源:
下載原始碼套件 opensta:
- [opensta_0~20191111gitc018cb2+dfsg-1build1.dsc]
- [opensta_0~20191111gitc018cb2+dfsg.orig.tar.xz]
- [opensta_0~20191111gitc018cb2+dfsg-1build1.debian.tar.xz]
維護者:
Original Maintainers:
- Debian Electronics Team (郵件存檔)
- Ruben Undheim
外部的資源:
- 主頁 [github.com]
相似套件:
Gate-level Static Timing Analyzer
After synthesis, place and route of a digital circuit, it is necessary to verify the timing of the design. OpenSTA is a tool for doing exactly that. It has a Tcl interface for entering commands for analysing designs.
It typically takes as input a verilog netlist, a liberty file, and other parasitics information from the placed and routed design.
其他與 opensta 有關的套件
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- dep: libc6 (>= 2.29)
- GNU C Library: Shared libraries
同時作為一個虛擬套件由這些套件提供: libc6-udeb
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- dep: libgcc-s1 (>= 3.0) [amd64]
- GCC support library
- dep: libgcc-s1 (>= 3.5) [armhf]
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- dep: libreadline8 (>= 6.0)
- GNU readline and history libraries, run-time libraries
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- dep: libstdc++6 (>= 6)
- GNU Standard C++ Library v3
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- dep: libtcl8.6 (>= 8.6.0)
- Tcl (the Tool Command Language) v8.6 - run-time library files
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- dep: zlib1g (>= 1:1.1.4)
- compression library - runtime