Paketti: opensta-dev (0~20191111gitc018cb2+dfsg-1build1)
Links for opensta-dev
Trisquel-palvelut:
Imuroi lähdekoodipaketti opensta:
- [opensta_0~20191111gitc018cb2+dfsg-1build1.dsc]
- [opensta_0~20191111gitc018cb2+dfsg.orig.tar.xz]
- [opensta_0~20191111gitc018cb2+dfsg-1build1.debian.tar.xz]
Ylläpitäjä:
Original Maintainers:
- Debian Electronics Team (Mail Archive)
- Ruben Undheim
External Resources:
- Kotisivu [github.com]
Samankaltaisia paketteja:
Gate-level Static Timing Analyzer - development files
After synthesis, place and route of a digital circuit, it is necessary to verify the timing of the design. OpenSTA is a tool for doing exactly that. It has a Tcl interface for entering commands for analysing designs.
It typically takes as input a verilog netlist, a liberty file, and other parasitics information from the placed and routed design.
This package contains the header files and some libraries for development.
Imuroi opensta-dev
Arkkitehtuuri | Paketin koko | Koko asennettuna | Tiedostot |
---|---|---|---|
arm64 | 1,137.4 kt | 9847 kt | [tiedostoluettelo] |