软件包: opensta-dev (0~20191111gitc018cb2+dfsg-1build1)
opensta-dev 的相关链接
Trisquel 的资源:
下载源码包 opensta:
- [opensta_0~20191111gitc018cb2+dfsg-1build1.dsc]
- [opensta_0~20191111gitc018cb2+dfsg.orig.tar.xz]
- [opensta_0~20191111gitc018cb2+dfsg-1build1.debian.tar.xz]
维护者:
Original Maintainers:
- Debian Electronics Team (Mail Archive)
- Ruben Undheim
外部的资源:
- 主页 [github.com]
相似软件包:
Gate-level Static Timing Analyzer - development files
After synthesis, place and route of a digital circuit, it is necessary to verify the timing of the design. OpenSTA is a tool for doing exactly that. It has a Tcl interface for entering commands for analysing designs.
It typically takes as input a verilog netlist, a liberty file, and other parasitics information from the placed and routed design.
This package contains the header files and some libraries for development.